Y. Kobori, N. Tsukiji, N. Takai, H. Kobayashi," EMI Reduction by Extended Spread Spectrum in Switching Converter," EMC Joint Workshop 2015, Bangkok (Jun.2015)
Y. Kobori, T. Arafune, N. Tsukiji, N. Takai, H.Kobayashi," Selectable Notch Frequencies of EMI Spread Spectrum Using Pulse Modulation in Switching Converter," The 11th IEEE Conference on ASIC (ASICON)2015, B8-7, Chengdu/China (Nov. 2015)
Y. Kobori, N. Tsukiji, N. Takai, H. Kobayashi, "Spread Spectrum with Notch Frequency using Pulse Coding Method for Switching Converter of Communication Equipment," The International Conference on Electronic Information and Communication Engineering (ICEICE), SⅡ-01, Amsterdam (May, 2016)
Y. Kobori, N. Tsukiji, N. Takai, H. Kobayashi, "EMI Reduction by Extended Spread Spectrum in Switching Converter," EMC Joint Workshop 2015, Bangkok (Jun. 2015)
IEC 62236-3-2 Ed.2: Railway applications-Electromagnetic compatibility (EMC)-Part3-2: Rolling stock-Apparatus
PC Watch:「福田昭のセミコン業界最前線DRAM開発の主役から外されるPC向けDRAM」,http://pc.watch.impress.co.jp/docs/column/semicon/20130514_599102.html.
PC Watch:「Intelが展望する2014年のDRAMトレンド」,http://pc.watch.impress.co.jp/docs/news/event /20130919_615990.html
Brian Young(著):"Digital Signal Integrity,"Prentice Hall, 2000
Eric Bogatin(著),須藤俊夫(監訳):「高速デジタル信号の伝送技術 シグナルインテグリティ入門」,第9章,第11章,丸善,2010年7月
Hayato Sasaki, Masato Kanazawa,Toshio Sudo, Atsushi Tomishima, Toshiyuki Kaneko:"New Frequency Dependent Target Impedance for DDR3 Memory System,"Electrical Design of Advanced Packaging and Systems Symposium (EDAPS) 2011 IEEE, Dec. 2011
Wang Li-xin, Zhang Yu-xia, Zhang Gang:"Power Integrity Analysis for High-speed PCB,"2010 First International Conference on Pervasive Computing, Signal Processing and Applications, Sep. 2010
Yasuhiro Ikeda, Masahiro Toyama, Satoshi Muraoka, Yutaka Uematsu, Hideki Osaka:"Power distribution network design method based on frequency-dependent target impedance for jitter design of memory interface,"CPMT Symposium Japan (ICSJ), 2013 IEEE 3rd, Nov. 2013
Hai Lan, Xinhai Jiang, Jihong Ren:"Analysis of Power Integrity and Its Jitter Impact in a 4.3Gbps Low-Power Memory Interface,"Electronic Components and Technology Conference (ECTC), 2013 IEEE 63rd, May 2013
Jingook Kim, Yuzo Takita, Kenji Araki, Jun Fan:"Improved Target Impedance for Power Distribution Network Design With Power Traces Based on Rigorous Transient Analysis in a Handheld Device,"IEEE TRANSACTIONS ON COMPONENTS, PACKAGING AND MANUFACTURING TECHNOLOGY, VOL.3, NO.9, Sep. 2013
Raul Fizesan, Dan Pitica:"Simulation for Power Integrity to Design a PCB for an Optimum Cost,"2010 IEEE 16th International Symposium for Design and Technology in Electronic Packaging (SIITME), Sep. 2010
Mu-Shui Zhang, Hong-Zhou Tan, Jun-Fa Mao:"New Power Distribution Network Design Method for Digital Systems Using Time-Domain Transient Impedance,"IEEE TRANSACTIONS ON COMPONENTS, PACKAGING AND MANUFACTURING TECHNOLOGY, VOL.3, NO.8, AUGUST 2013
"Immunity Evaluation of SRAM Core Using DPI with On-Chip Diagnosis Structures," T. Sawada, T. Toshikawa, K. Yoshikawa, H. Takata, K. Nii, M. Nagata, in Proc. IEEE 8th International orkshop on Electromagnetic Compatibility of Integrated Circuits, pp. 65-70, Nov. 2011.
"Measurements and Co-Simulation of On-Chip and On-Board AC Power Noise in Digital Integrated Circuits," K. Yoshikawa, Y. Sasaki, K. Ichikawa, Y. Saito, M. Nagata, in Proc. IEEE 8th International orkshop on Electromagnetic Compatibility of Integrated Circuits, pp. 76-81, Nov. 2011.