書籍
書籍検索
近日発売 送料無料

設計技術シリーズ

RF集積回路の設計法―5G時代の高周波技術―

著者: 前多 正氏(芝浦工業大学)
価格: 4,500円(本体)+税
判型: A5
ページ数: 354 ページ
ISBN: 978-4-904774- 86-1
発売日: 2020/2/27

発売前の予約注文を承っております

【著者紹介】

【目次】

1.雑音

  1. 1-1 抵抗の雑音
  2. 1-2 MOSFETの雑音
  3. 1-3 熱雑音の分布

2.低雑音増幅器(Low-Noise Amplifier:LNA)

  1. 2-1 受信部構成と受信電力強度
  2. 2-2 雑音指数と入力換算雑音
  3. 2-3 縦列接続構成の受信機の雑音
  4. 2-4 受信信号と雑音レベルの関係
  5. 2-5 入出力整合
  6. 2-6 LNA入力インピーダンスのスミスチャート上の軌跡
  7. 2-7 カスコード構成LNA
  8. 2-8 寄生素子の影響
  9. 2-9 増幅器の出力雑音
  10. 2-10 等雑音円、等利得円
  11. 2-11 回路の非線形性
  12. 2-12 雑音キャンセル型LNA

3.ミキサ(Mixer:MIX)

  1. 3-1 周波数変換の原理
  2. 3-2 イメージ信号
  3. 3-3 イメージ除去ミキサ
  4. 3-4 イメージ除去比
  5. 3-5 位相差π/2(90度)の信号生成回路
    1. 3-5-1 ポリフェーズフィルタ
    2. 3-5-2 フリップフロップを利用した回路
  6. 3-6 ミキサ回路の具体例
    1. 3-6-1 受動ミキサ
    2. 3-6-2 受動ミキサの雑音
    3. 3-6-3 能動ミキサの変換利得
    4. 3-6-4 能動ミキサの雑音
  7. 3-7 ハーモニックリジェクションミキサ
  8. 3-8 最新のミキサ回路

4.電圧制御発振器(Voltage Controlled Oscillator:VCO)

  1. 4-1 LC発振器の発振条件
  2. 4-2 位相雑音
  3. 4-3 その他雑音の経路(アップコンバージョン)及び雑音抑制回路
  4. 4-4 位相雑音が受信動作に及ぼす影響
  5. 4-5 VCOの回路構成例
    1. 4-5-1 n型MOS-VCO
  6. 4-6 直交VCO(Quadrature-VCO)
  7. 4-7 注入同期VCO

5.フェーズロックループ(Phase Locked Loop:PLL)

  1. 5-1 整数分周PLL
    1. 5-1-1 分周器
    2. 5-1-2 位相比較器
    3. 5-1-3 PLL伝達関数とループフィルタ
    4. 5-1-4 PLLループフィルタの実装
    5. 5-1-5 PLLの周波数応答
    6. 5-1-6 雑音源と位相雑音
  2. 5-2 分数分周PLL(fractional-N PLL)
    1. 5-2-1 理想的な分数分周
    2. 5-2-2 シグマデルタ変調器(ΣΔ変調器)と分周比のランダム化
    3. 5-2-3 MASH
    4. 5-2-4 アキュムレータのビット数とスプリアス
    5. 5-2-5 シグマデルタ変調器を用いた分数分周PLL例
    6. 5-2-6 分数分周PLLの伝達関数と位相雑音特性
  3. 5-3 デジタル制御PLL
    1. 5-3-1 デジタル制御発振器
    2. 5-3-2 シグマデルタ変調器
    3. 5-3-3 位相比較
    4. 5-3-4 時間デジタル変換器
    5. 5-3-5 PLL伝達関数とデジタルループフィルタ
    6. 5-3-6 ADPLLの位相雑音

6.アナログベースバンド

  1. 6-1 フィルタ特性とアナログベースバンド信号
  2. 6-2 gmCフィルタ
    1. 6-2-1 単相入力・単相出力gmアンプ
    2. 6-2-2 差動入力gmアンプ
    3. 6-2-3 gmCフィルタ
    4. 6-2-4 代表的なフィルタ特性
    5. 6-2-5 フィルタ特性の自動調整回路
  3. 6-3 離散時間フィルタ
    1. 6-3-1 スイッチトキャパシタを用いた離散処理フィルタ
    2. 6-3-2 デューティ制御離散処理フィルタ
  4. 6-4 ベースバンドアンプ(IFアンプ)

7.受信部全体設計(レベルダイア設計)

  1. 7-1 受信機アーキテクチャ
  2. 7-2 レベルダイア設計
  3. 7-3 アナログ回路の不完全性による復調性能への影響

8.送信部(トランスミッタ)設計

  1. 8-1 トランシーバ全体構成
  2. 8-2 送信機の性能仕様
  3. 8-3 送信機アーキテクチャ
  4. 8-4 送信信号が受信性能に及ぼす影響(SAWフィルタの必要性)
  5. 8-5 低雑音ドライバアンプ回路設計
  6. 8-6 パワーアンプ(Power Amplifier:PA)
  7. 8-7 低歪み・高効率化手法
  8. 8-8 アンテナスイッチ
  9. 8-9 サーキュレータ

【参考文献】

  • C. E. Shannon, "A Mathematical Theory of Communication", The Bell System Technical Journal, Vol. 27, pp. 379-423, 623-656, 1948.
  • 齊藤洋一、「デジタル無線通信の変復調」、電子情報通信学会
  • 「平成28 年度 情報通信審議会 情報通信技術分科会 携帯電話等高度化委員会報告」、携帯電話等高度化委員会、資料118-1-2、平成28年5月24日
  • 橋口住久著、「低周波ノイズ 1/fゆらぎとその測定法」、朝倉書店
  • Behzad Razavi, "Impact of Distributed Gate Resistance on the Performance of MOS Devices", IEEE Transactions on Circuits and Systems Part-I, Vol41, No.11, pp. 750-754, 1994.
  • 式部幹、田中公男、橋本秀雄、「大学課程 情報伝送工学」、オーム社
  • 岩井誠人、前川泰之、市坪信一、「電波伝搬」、朝倉書店
  • 守倉正博、久保田周治、監修、「改訂版802.11高速無線LAN教科書」、インプレスR&D
  • "Bluetooth Core Specification v 5.0", Bluetooth SIG, Publication Date: Dec 06 2016.
  • 式部幹、田中公男、橋本秀雄、「大学課程 情報伝送工学」、オーム社。
  • 市川古都美、市川裕一、「高周波回路設計のためのSパラメータ詳解」CQ出版。
  • 松平健、「等価雑音源による回路雑音理論とスミスチャートによるその応用」、一般社団法人映像情報メディア学会、テレビジョン 24 (5) , 352-360, 1970
  • 橋口住久著、「低周波ノイズ 1/fゆらぎとその測定法」、朝倉書店。
  • 浅田邦博、松澤昭共編、「アナログRF CMOS集積回路設計」、培風館
  • 黒田忠広編著、「アナログCMOS集積回路の設計」、丸善出版
  • Tadashi Maeda, Noriaki Matsuno, Shinichi Hori, Tomoyuki Yamase, Takashi Tokairin, Kiyoshi Yanagisawa, Hitoshi Yano, Robert Walkington, Keiichi Numata, Nobuhide Yoshida, Yuji Takahashi, and Hikaru Hida, "A Low-power Dual-band Triple-mode WLAN CMOS Transceiver", IEEE Journal of Solid State Circuits, Vol. 41, Issue 11, pp. 2481 - 2490, 2006.
  • Federico Bruccoleri, Eric A. M. Klumperink, Bram Nauta, "Wide-Band CMOS Low-Noise Amplifier Exploiting Thermal Noise Canceling", Journal of Solid-State Circuits, Vol. 39, No. 2, pp. 275-282, 2004.
  • 黒田忠広編著、「第2版 RFマイクロエレクトロニクス 入門編」、丸善出版
  • Behzad Razavi, "RF Microelectronics 2nd edition", McGraw-Hill International Edition, Electrical Engineering Edition.
  • Youngjin Kim, Sangho Shin, and Kwyro Lee, "Architecture and Algorithm For High Precision Image Rejection and Spurious Rejection Mixers Using Digital Compensation", 2002 IEEE MTT-S International Microwave Symposium Digest, WE2B-4, pp.709-802,2002.
  • Ediz Çetin, Îzzet Kale and Richard C. S. Morling, "ADAPTIVE SELF-CALIBRATING IMAGE REJECTION RECEIVER", 2004 IEEE International Conference on Communications, pp. 2731-2735, 2004.
  • Farbod Behbahami, Yoji Kishigami, John Leete, and Asas A. Abidi, "CMOS Mixers and Polyphase Filters for Large Image Rejection", IEEE Journal of Solid-State Circuits, Vol. 36, No. 6, pp.873-886, 2001.
  • Manolis T. Terrovitis, and Robert G. Meyer, "Noise in Current-Commutating CMOS Mixers", IEEE Journal of Solid-State Circuits, Vol. 34, No. 6, pp.772-783, 1999.
  • B. Gilbert, "A precise four quadrant multiplier with subnanosecond response," IEEE Journal of Solid-State Circuits, vol. SC-3, No.4, pp. 365-373, 1968.
  • Jeffrey A. Weldon, R. Sekhar Narayanaswami, Jacques C. Rudell, Li Lin, Masanori Otsuka, Sebastien Dedieu, Luns Tee, King-Chun Tsai, Cheol-Woong Lee, and Paul R. Gray, "1.75-GHz Highly Integrated Narrow-Band CMOS Transmitter with Harmonic-Rejection Mixers", IEEE Journal of Solid-State Circuits, Vol. 36, No. 12, pp. 2003-2014, 2001.
  • Supisa Lerstaveesin, Manoj Gupta, David Kang, and Bang-Sup Song, "A 48-860 MHz CMOS Low-IF Direct-Conversion DTV Tuner", IEEE J of Solid-state Circuits, vol. 43, no. 9, pp. 2013 - 2024, 2008.
  • Caroline Andrews and Alyosha C Molnar, "A Passive-Mixer-First Receiver with Baseband-Controlled RF Impedance Matching, < 6dB NF, and > 27dBm Wideband IIP3", Digest of 2010 IEEE International Solid-State Circuits Conference, pp. 46-47, 2010.
  • Eric A.M. Klumperink, Hugo J. Westerveld and Bram Nauta, "N-path filters and Mixer-First Receivers: A Review", 2017 IEEE Custom Integrated Circuits Conference, 2017.
  • A. Mirzaei, H. Darabi, A. Yazdi, Z. Zhou, E. Chang, and P. Suri, "A 65 nm CMOS Quad-Band SAW-Less Receiver SoC for GSM/GPRS/EDGE", IEEE J of Solid-state Circuits, vol. 46, no. 4, pp. 950 - 964, 2011.
  • A. Mirzaei, H. Darabi, J. C. Leete, and Y. Chang, "Analysis and Optimization of Direct Conversion Receivers With 25% Duty-Cycle Current-Driven Passive Mixers", IEEE Trans. on Circuits and Systems-I, vol. 57, no. 9, pp. 2353 - 2366, 2010.
  • A. Mirzaei, H. Darabi, J. C. Leete, X. Chen, K. Juan, and A. Yazdi, "Analysis and Optimization of Current-Driven Passive Mixers in Narrowband Direct-Conversion Receivers", IEEE J of Solid-state Circuits, vol. 44, no. 10, pp. 2678 - 2688, 2009.
  • A. Mirzaei and H. Darabi, "Analysis of Imperfections on Performance of 4-Phase Passive-Mixer-Based High-Q Bandpass Filters in SAW-Less Receivers", IEEE Trans. on Circuits and Systems-I, vol. 58, no. 5, pp. 879 - 892, 2011.
  • Kazuki Kishida, Tadashi Maeda, "Simple, Analytical Expressions of an Effect of Local Signal Imperfections on 4-Phase Passive Mixer Based Bandpass Filter", IEEE Transactions on Circuits and Systems I: Regular Papers, Vol. 66, No. 1, pp. 147-160, 2019.
  • Ali Hajimiri, and Thomas H. Lee, "The Design of Low Noise Oscillators", Kluwer Academic Publishers, 2004.
  • 相川正義、大平孝、徳満恒雄、広田哲夫、村口正弘、「モノリシックマイクロ波集積回路 (MMIC) 」、電子情報通信学会、コロナ社.
  • 大平孝、「発振回路における歪と雑音」、MWE2003 Microwave Workshop Digest、TL03-02.
  • D. B. Leeson, "A Simple Model of Feedback Oscillator Noise Spectrum", Proceedings of the IEEE, 54 (2) : 329-330, 1966.
  • 伊藤信之、「CMOS 集積回路上の発振器設計の基礎」、MWE2015 Microwave Workshop Digest、WE3B-1、pp 35-44, 2015.
  • Emad Hegagi, Henrik Sjoland, Asad A. Abidi, "A filtering Technique to Lower LC Oscillator Phase Noise", IEEE Journal of Solid-State Circuits, Vol.36, No. 12, pp. 1921-1930, 2001
  • Emad Hegazi, and Asad A. Abidi, "Varactor Characteristics, Oscillator Tuning Curves, and AM-FM Conversion", IEEE Journal of Solid-State Circuits, Vol. 38, No. 6, pp. 1033-1039, 2003.
  • Ting-Ping Liu, "A 6.5GHz Monolithic CMOS Voltage-Controlled Oscillator", IEEE International Solid-State Circuits Conference, WP23.7, pp. 404-405, 1999.
  • P. Andreani, A. Bonfanti, L. Romano, and C. Samori, "Analysis and design of a 1.8-GHz CMOS LC quadrature VCO", IEEE Journal of Solid-State Circuits, vol.37, no.12, pp.1737-1740, Dec. 2002.
  • 山田 恭平、一瀬 健人,大平 孝、「帰還部の位相特性を考慮することによる大平の注入同期Qを用いたロックレンジ推定の精度向上に関する考察」、信学技報 MW2014-44、vol. 114, No. 111、pp.13-16、2014.
  • Behzad Razavi, "A Study of Injection Locking and Pulling in Oscillators", IEEE Journal of Solid-State Circuits, Vol. 39, No. 9, pp. 1415-1424, 2004.
  • Robert Adler, "A Study of Locking Phenomena in Oscillators", Proceedings of The IEEE, Vol. 61, No. 10, pp. 1380-1385, 1973.
  • K. Kurokawa, "Injection locking of microwave solid-state oscillators", Proc. IEEE, vol. 61, pp. 1336-1410, Oct. 1973.
  • 黒田忠広編著、「第2版 RFマイクロエレクトロニクス 実践応用編」、丸善出版
  • Behzad Razavi, "RF Microelectronics 2nd edition", McGraw-Hill International Edition, Electrical Engineering Edition.
  • 黒田忠広監訳、「第2版 RFマイクロエレクトロニクス 実践応用編」、丸善出版
  • 小宮浩、高周波PLL回路のしくみと設計法、CQ出版社。
  • Cicero S. Vaucher, Igor Ferencic, Matthias Locher, Sebastian Sedvallson, Urs Voegeli, and Zhenhua Wang, "A Family of Low-Power Truly Modular Programmable Dividers in Standard 0.35 μm CMOS Technology", IEEE Journal of Solid-State Circuits, Vol. 35, No. 7, pp. 1039-1045, 2000.
  • 新中新二、「フーリエ級数・変換とラプラス変換」、数理工学社。
  • Kingsford-Smith, "Device for synthesizing frequencies which are rational multiples of afundamental frequency", USP3928813, Dec 23, 1975.
  • Y. Matuya, K. Uchiyama, A. Iwata, T. Kobayashi, M. Ishikawa, and T. Yoshitome, "A 16-bit oversampling A-to-D conversion technology using triple-integration noise shaping", IEEE J. Solid-State Circuits, vol. SC-22, No.6, pp. 921-929, 1987.
  • 湯川 彰、「オーバサンプリングA-D変換技術」、日経BP社、1994
  • Riley, "Frequency synthesizers having dividing ratio controlled by sigma-delta modulator", USP4965531, 1990.
  • Tom A. D. Riley, Miles A. Copeland, and Tad A. Kwasniewski, "Delta-Sigma Modulation in Fractional-N Frequency Synthesis", IEEE Journal of Solid-State Circuits, Vol. 28, No. 5, pp. 553-559, 1993.
  • Brian Miller, and Robert J. Conley, "A Multiple Modulator Fractional Divider", IEEE trans. on inst. and meas. vol. 40, No. 3, pp. 578-583, 1991.
  • 三谷 政昭、「信号解析のための数学-ラプラス変換、z変換、DFT、フーリエ級数、フーリエ変換-」、森北出版、1998。
  • 足立修一、「フーリエ変換 ラプラス変換、z変換」、コロナ社、2014.
  • Raja K. K. R. Sandireddy, Foster F. Dai, Richard C. Jaeger, "A generic architecture for multi-modulus dividers in low-power and high-speed frequency synthesis", Digest of Papers. 2004 Topical Meeting onSilicon Monolithic Integrated Circuits in RF Systems, pp.243-246, 2004.
  • Robert Bogdan Staszewski, Chih-Ming Hung, Dirk Leipold, and Poras T. Balsara, "A First Multigigahertz Digitally Controlled Oscillator for Wireless Applications", IEEE Transactions on Microwave and Techniques, Vol. 51, No. 11, pp. 2154-2164, 2003.
  • Robert Bogdan Staszewski, Khurram Muhammad, et al., "All-Digital TX Frequency Synthesizer and Discrete-Time Receiver for Bluetooth Radio in 130-nm CMOS", IEEE Journal of Solid-State Circuits, vol. 39, No. 12, pp. 2278-2289, 2004.
  • Robert Bogdan Staszewski, and Poras T. Balsara, "All-Digital Frequency Synthesizer in Deep-Submicron CMOS", Wiley-Interscience, 2006.
  • 「完全ディジタルPLL回路の設計」、Robert Bogdan Staszewski (著)、Poras T. Balsara (著)、山田 庸一郎 (翻訳)、小林 春夫 (翻訳)、CQ出版社.
  • Robert Bogdan Staszewski, John Wallberg, Jinseok Koh, and Poras T. Balsara, "High-speed Digital Circuits for 2.4 GHz All-Digital RF Frequency Synthesizer in 130 nm CMOS", Proceedings of the 2004 IEEE Dallas/CAS Workshop Implementation of High Performance Circuits, pp. 167-170. 2004.
  • Robert Bogdan Staszewski, and Poras T. Balsara, "Phase-Domain All-Digital Phase-Locked Loop", Transactions on Circuits and Systems-II, Vol. 52, No. 3, pp. 159-163, 2005.
  • Robert B. Staszewski, Dirk Leipold, and Poras T. Balsara, "Just-in-time gain estimation of an RF digitally-controlled oscillator for digital direct frequency modulation", Transactions on Circuits and Systems-II, Vol50, No. 11, pp. 887-892, 2003.
  • R R. B. Staszewski, D. Leipold, C.-M. Hung, and P. T. Balsara, "TDC-based frequency synthesizer for wireless applications," in Proc. IEEE Radio Frequency Integrated Circuits (RFIC) Symp., Jun. 2004, pp. 215-218.
  • V. Ramakrishnan, and Poras T. Balsara, "A Wide-Range, High-Resolution, Compact, CMOS Time to Digital Converter", Proc. VLSI Design (VLSID'06), pp. 197-202, Jan. 2006.
  • Minjae Lee, Mohammad E. Heidari and Asad A. Abidi, "A low noise, wideband digital phase-locked loop based on a new time-to-digital converter with subpicosecond resolution", VLSI Symposium Dig. Tech. Papers, pp. 112-113, 2008.
  • Takashi Tokairin, Mitsuji Okada, Masaki Kitsunezuka, Tadashi Maeda, and Muneo Fukaishi, "A 2.1-to-2.8-GHz low-phase-noise all-digital frequency synthesizer with a time-windowed time-to-digital converter", IEEE Journal of Solid-State Circuits, vol. 45, no. 12, pp. 2582-2590, Dec. 2010.
  • Chun-Ming Hsu, Matthew Z. Straayer, and Michael H. Perrott, "A Low-Noise Wide-BW 3.6-GHz Digital ΔΣ Fractional-N Frequency Synthesizer With a Noise-Shaping Time-to-Digital Converter and Quantization Noise Cancellation", IEEE ISSCC Dig. Tech. Papers, pp. 340-341, Feb. 2008.
  • Minjae Lee and Asad A. Abidi, "A 9b, 1.25ps Resolution Coarse-Fine Time-to-Digital Converter in 90nm CMOS that Amplifies a Time Residue", VLSI Symposium Dig. Tech. Papers, pp.168-169, 2007.
  • Borivoje Nikolić, Vojin G. Oklobdžija, Vladimir Stojanović,Wenyan Jia, James Kar-Shing Chiu, and Michael Ming-Tak Leung, "Improved Sense-Amplifier-Based Flip-Flop: Design and Measurements", IEEE Journal of Solid-State Circuits, vol. 35, No. 6, pp. 876-884, 2000.
  • Robert Bogdan Staszewski, Sudheer Vemulapalli, Prasant Vallur, John Wallberg, and Poras T. Balsara, "Time-to-Digital Converter for RF Frequency Synthesis in 90 nm CMOS", IEEE Radio Frequency Integrated Circuits Symposium, RTU3B-4, 473-476, 2005.
  • H. H. Chang, Chia-Huang Fu, and Monty Chiu, "A 320fs-RMS-jitter and 300kHz-BW all-digital fractional-N PLL with self-corrected TDC and fast temperature tacking loop for WiMax/WLAN 11n", VLSI Symposium Dig. Tech. Papers, pp. 188-189, 18-2, 2009.
  • 宮内一洋、「フィルタの解析と設計」、コロナ社、2009.
  • Arthur B. Williams, "Analog Filter and Circuits Design Handbook", McGraw-Hill Education, 2010.
  • Tahira Parveen, "Textbook of Operational Transconductance Amplifier and Analog Integrated Circuits", I. K. International Publishing House Pvt. Ltd., 2009.
  • Hongjiang Song, "The Arts of VLSI Circuit Design: Symmetry Approaches Toward Zero PVT Sensitivity", Xlibris, Corp., 2011.
  • Bram Nauta, "ANALOG CMOS FILTERS FOR VERY HIGH FREQUENCIES", Kluwer Academic Publishers, 1993.
  • Josk Silva-Martinez, Michel S. J. Steyaert, and Willy M. C. Sansen, "A Large-Signal Very Low-Distortion Transconductor for High-Frequency Continuous-Time Filters", IEEE Journal of Solid-State Circuits, Vol. 26, No. 7, pp. 946-955, 1991.
  • Mohammad Mehdi Farhad and Sattar Mirzakuchaki, "A Second-Order Gm-C Continuous Time Filter in Mobile Radio Receiver Architecture", 2010 2nd international Conference on Education Technology and Computer (ICETC), pp. V5 170-173, 2010.
  • R. Bagheri, et al., "An 800MHz to 5GHz Software-Defined Radio Receiver in 90nm CMOS," IEEE International of Solid State Circuit Conference (ISSCC) Digest of Technical Papers, pp. 480-481, 2006.
  • R. B. Staszewski, et al., "All-Digital TX Frequency Synthesizer and Discrete-Time Receiver for Bluetooth Radio in 130-nm CMOS," IEEE Journal of Solid-state Circuits, pp. 2278-2291, Dec. 2004.
  • Masaki Kitsunezuka, Shinichi Hori, and Tadashi Maeda, "A Widely-Tunable Reconfigurable CMOS Analog Baseband IC for Software-Defined Radio", IEEE Journal of Solid-State Circuits, Vol.44, No. 9, pp. 2496-2502, 2009.
  • 三谷政昭、「信号解析のための数学-ラプラス変換,z変換、DFT、フーリエ級数、フーリエ変換-」、森北出版、1998。
  • 足立修一、「フーリエ変換 ラプラス変換、z変換」、コロナ社、2014.
  • 浅田邦博、松澤昭共編、「アナログRF CMOS集積回路設計」培風館、2011.
  • P. V. Ananda Mohan, V. Ramachandran, and M. N. S. Swamy, "Parasitic-Compensated Single Amplifier SC Biquad Equivalent to Fleischer-Laker SC Biquad", IEEE Transactions on Circuits and Systems, Vol. CAS-33, No. 4, pp. 458-460, 1986.
  • Behzad Razavi, "A Millimeter-Wave CMOS Heterodyne Receiver With On-Chip LO and Divider", IEEE Journal of Solid-State Circuits, Vol.43, No. 2, pp. 477-485, 2008.
  • S. Bozzola1, D. Guermandi, F. Vecchi, M. Repossi, M. Pozzoni, A. Mazzanti and F. Svelto, "A Sliding IF Receiver for mm-wave WLANs in 65nm CMOS", Technical digest of IEEE 2009 Custom Intergrated Circuits Conference (CICC), pp669-672, 2009.
  • Kenichi Agawa, Hideaki Majima, Hiroyuki Kobayashi, Masayuki Koizumi, Shinichiro Ishizuka, Takeshi Nagano, Makoto Arai, Yutaka Shimizu, Go Urakawa, Nobuyuki Itoh, Mototsugu Hamada, and Nobuaki Otsuka, "A -90dBm Sensitivity 0.13μm CMOS Bluetooth Transceiver Operating in Wide Temperature Range", Technical digest of IEEE 2007 Custom Intergrated Circuits Conference (CICC), pp655-658, 2007.
  • Li Lin, Naratip Wongkomet, David Yu, Chi-Hung Lin, Ming He, Brian Nissim, Steven Lyuee, Paul Yu, Todd Sepke, Shervin Shekarchian, Luns Tee, Paul Muller, Jonathan Tam, Thomas Cho, "A fully integrated 2×2 MIMO dual-band dual- mode direct-conversion CMOS transceiver for WiMAX/WLAN applications", IEEE International of Solid State Circuit Conference (ISSCC) Digest of Technical Papers, 24.5, pp.416-417, 2009.
  • Tadashi Maeda, Noriaki Matsuno, Shinichi Hori, Tomoyuki Yamase, Takashi Tokairin, Kiyoshi Yanagisawa, Hitoshi Yano, Robert Walkington, Keiichi Numata, Nobuhide Yoshida, Yuji Takahashi, and Hikaru Hida, "A Low-power Dual-band Triple-mode WLAN CMOS Transceiver", IEEE Journal of Solid-State Circuits, Vol. 41, Issue 11, pp. 2481 - 2490, 2006.
  • 岩井誠人、前川泰之、市坪信一、「電波伝搬」、朝倉書店
  • 式部幹、田中公男、橋本秀雄、「大学課程 情報伝送工学」、オーム社。
  • Francois Horlin and Andre Bourdoux, "Digital Compensation for Analog Front-Ends", A John Wiley & Sons, Ltd, Publication, 2008.
  • Tim Schenk, "RF Imperfections in High-rate Wireless Systems Impact and Digital Compensation", Springer Science, 2010.
  • A. Schuchert, R. Hasholzner, and P. Antoine, "A novel IQ imbalance compensation scheme for the reception of OFDM signals", IEEE Trans. Consum. Elect., vol. 47, no. 3, pp.313-318, 2001.
  • E. Tsui and J. Lin, "Adaptive IQ imbalance correction for OFDM systems with frequency and timing offsets", in Proc. IEEE Global Telecommun. Conf., pp. 4004-4010, 2004.
  • A. Tarighat, R. Bagheri, and A. H. Sayed, "Compensation Schemes and Performance Analysis of IQ imbalances in OFDM Receivers", IEEE Trans. on Sign. Proc., vol. 53, no. 8, pp. 3257-3268, 2005.
  • 斉藤忠夫、立川敬二、"新版 移動通信ハンドブック、"オーム社、2000.
  • K. Feher, "Telecommunications measurements, analysis, and instrumentation," Prentice-Hall Inc., 1987.
  • 前多正、RF-CMOSトランシーバフロントエンド回路の最新動向」MWE2009
  • 斉藤洋一、"ディジタル無線通信の変復調、"信学会、1996.
  • 石井聡、「無線通信とデジタル変復調技術」、CQ出版社、2006.
  • Dimitris F. G. Papadopoulos, Qiuting Huang, "A Linear Uplink WCDMA Modulator with -156dBc/Hz Downlink SNR", IEEE International of Solid State Circuit Conference (ISSCC) Digest of Technical Papers, 19.2 pp.338-339, 2007.
  • Christopher Jones, Bernard Tenbroek, Paul Fowers,Christophe Beghein, Jonathan Strange, Federico Beffa,Dimitris Nalbantis, "Direct-Conversion WCDMA Transmitter with -163dBc/Hz Noise at 190MHz Offset", IEEE International of Solid State Circuit Conference (ISSCC) Digest of Technical Papers, 19.1, pp.336-337, 2007.
  • T. Sowlati, et al., "Single-Chip Multiband WCDMA/HSDPA/HSUPA/EGPRS Transceiver with Diversity Receiver and 3G DigRF Interface Without SAW Filters in Transmitter / 3G Receiver Paths", IEEE International of Solid State Circuit Conference (ISSCC) Digest of Technical Papers, pp. 116-117, 2009.
  • Ahmad Mirzaei, Hooman Darabi , "A Low-Power WCDMA Transmitter with a Integrated Notch Filter", IEEE International of Solid State Circuit Conference (ISSCC) Digest of Technical Papers, 10.7, pp.212-213, 2008.
  • Nathan O. Sokal, and Alan D. Sokal, "Class E - A New Class of High-Efficiency Tuned Single-Ended Switching Power Amplifiers", IEEE Journal of Solid-State Circuits, Vol.SC-10, No. 3, pp. 168-176, 1975.
  • Andrei Grebennikov, Nathan O. Sokal, and Marc J. Franco, "Switchmode RF and Microwave Power Amplifiers Second Edition", Academic Press Elsevier, 2012.
  • Melina Apostolidou, Mark P. van der Heijden, Domine M. W. Leenaerts, Jan Sonsky, Anco Heringa, and Iouri Volokhine, "A 65 nm CMOS 30 dBm Class-E RF Power Amplifier With 60% PAE and 40% PAE at 16 dB Back-Off", IEEE Journal of Solid-State Circuits, Vol. 44, No. 5, pp. 1372-1379, 2009.
  • Andrei V. Grebennikov and Herbert Jaeger, "Class E with Parallel Circuit - A New Challenge for High-Efficiency RF and Microwave Power Amplifiers", 2002 IEEE MTT-S International Microwave Symposium Digest, TH2D-1, pp. 1627-1630, 2002.
  • Mustafa Acar, Anne Johan Annema, and Bram Nauta, "Analytical Design Equations for Class-E Power Amplifiers", IEEE Transactions on Circuits and Systems Part I, Vol. 54 , No. 12, pp. 2706 - 2717, 2007.
  • Robert E. Zulinski, and John W. Stedman, "Class E Power Amplifiers and Frequency Multipliers with Finite DC-Feed Inductance", IEEE Transactions on Circuits and Systems, Vol. CAS-34, No.9, pp. 1074-1087, 1987.
  • David K. Choi and Stepben I. Long, "Finite DC Feed Inductor in Class E Power Amplifiers - A Simplified Approach", 2002 IEEE MTT-S International Microwave Symposium Digest, TH2D-5, pp. 1643-1646, 2002.
  • Andrei Grebennikov, "Load Network Design Technique for Class F and Inverse Class F PAs", From May 2011 High Frequency Electronics, pp.58-76, 2011.
  • 中山正敏、高木直、「電力増幅器の低歪・高効率化の手法」、Microwave Workshop & Exhibition (MWE)、TL03-02, 2005.
  • W. H. Doherty, "A New High Efficiency Power Amplifier for Modulated Waves", Proceedings of the Institute of Radio Engineers, Vol. 24. No. 9, pp. 1163-1182, 1936.
  • 末次正、「RF電力増幅器の基礎と設計法」、科学情報出版、2015.
  • R. Pullela, et al., "An Integrated Closed-Loop Polar Transmitter with Saturation Prevention and Low-IF Receiver for Quad-Band GPRS/EDGE ", ISSCC Dig. Tech. Papers, pp. 112-113, 2009.
  • トランジスタ技術編集部、「無線データ通信の基礎とRF部品活用法」、CQ出版.
  • Keiichi Numata, Yuji Takahashi, Tadashi Maeda, and Hikaru Hida, "A +2.4/0 V controlled high power GaAs SPDT antenna switch IC for GSM application", 2002 IEEE Radio Frequency Integrated Circuits (RFIC) Symposium. Digest of Papers, pp. 141-144, 2002.
  • Keiichi Numata, Yuji Takahashi, Tadashi Maeda, and Hikaru Hida, "A high-power-handling GSM switch IC with new adaptive-control-voltage-generator circuit scheme", 2003 IEEE Radio Frequency Integrated Circuits (RFIC) Symposium. Digest of Papers, MO2D-4, pp. 233-236, 2002.
  • Yuji Takahashi, Keiichi Numata, Tadashi Maeda, and Hikaru Hida, "A high-power SP3T antenna switch IC with adaptive-charge-pump-circuit topology", 34th European Microwave Conference, pp. 241-244, 2004.
  • Negar Reiskarimian , Mahmood Baraani Dastjerdi, Jin Zhou, and Harish Krishnaswamy , "Analysis and Design of Commutation-Based Circulator-Receivers for Integrated Full-Duplex Wireless", Journal of Solid-State Circuits, Vol. 53, No. 9, pp. 2190-2201, 2018.
  • Negar Reiskarimian, Jin Zhou, and Harish Krishnaswamy, "A CMOS Passive LPTV Nonmagnetic Circulator and Its Application in a Full-Duplex Receiver", Journal of Solid-State Circuits, Vol. 52, No. 5, pp. 1358-1372, 2017.
  • Negar Reiskarimian, Jin Zhou, Tsung-Hao Chuang, and Harish Krishnaswamy, "Analysis and Design of Two-Port N-Path Bandpass Filters With Embedded Phase Shifting", IEEE Trans. on Circuits and Systems-II, Vol. 63, No. 8, pp. 728-732, 2016.
  • Torbjorn Strom and Svante Signell, "Analysis of Periodically Switched Linear Circuits", IEEE Transactions on Circuits and Systems, Vol. CAS-24, No. 10, pp.531-541, 1977.
  • Michiel C. M. Soer, Eric A. M. Klumperink, Pieter-Tjerk de Boer, Frank E. van Vliet, and Bram Nauta, "Unified Frequency-Domain Analysis of Switched-Series-RC Passive Mixers and Samplers", IEEE Trans. on Circuits and Systems-I, Vol. 57, No. 10, pp. 2618-2631, 2010.
  • C. L. Phillips and J. M. Parr, "Signals, Systems and Transforms Fifth-edition", Englewood Cliffs, NJ: Prentice-Hall, 2014.
  • Aravind Nagulu, Andrea Al`u and Harish Krishnaswamy, "Fully-Integrated Non-Magnetic 180nm SOI Circulator with >1W P1dB, >+50dBm IIP3 and High Isolation across 1.85 VSWR", 2018 IEEE Radio Frequency Integrated Circuits Symposium (RFIC), RMO3A-1, pp. 104-107, 2018.
  • Tolga Dinc, Aravind Nagulu, and Harish Krishnaswamy, "A Millimeter-Wave Non-Magnetic Passive SOI CMOS Circulator Based on Spatio-Temporal Conductivity Modulation", IEEE Journal of Solid-State Circuits, Vol. 52, No. 12, pp. 3276-3292, 2017.

【口コミ】

  • ※口コミはありません。
ページトップへ戻る